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Development of scalable High-Speed MRAM technology for system LSI Embedding by NEC

June 24, 2009 · Filed Under Green Tech, Trendy Products 

Due to the progress in reducing cell size and the large capacity of system LSI, power consumption has increased. The current demands require reduced power consumption, which is partially accomplished by switching off during stand-by mode, a function that requires easy-use nonvolatile memory. In response to these market demands, NEC developed the world’s fastest SRAM-compatible MRAM with operation speed of 250 MHz in November 2007, and 32 Mbit MRAM for embedding in SoCs in February 2009. To further advance the scaling down of cell size, NEC Corporation (NEC) and NEC Electronics Corporation (NECEL) announced the world’s first development of a magnetic random access memory (MRAM) with current-induced domain wall motion using perpendicular magnetic anisotropy material. Domain wall is an interface separating magnetic domain. The newly developed current-induced domain wall motion writing method, using spin torque and perpendicular magnetization material has a capability of reducing current while writing for a scaled down cell beyond the 55 nanometer process. The newly developed domain wall motion elements are an advanced technology of spintronics which switches magnetization by domain wall motion with spin polarized current. Spintronics, or spin electronics, refers to the study of the role played by electron spin in solid state physics, and possible devices that specifically exploit spin properties instead of or in addition to charged degrees of freedom where as the Spin polarization is the degree to which the electron spin is aligned with a given direction. This successful development shows that high speed MRAM cells can be used to further advance the progress of scaling down size and it has widened the application area of memory changing into MRAM on system LSI.
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3 Responses to “Development of scalable High-Speed MRAM technology for system LSI Embedding by NEC”

  1. Integration of NanoBridge in the Cu Interconnects of Si LSI by NEC | Japan Technology Information on December 17th, 2009 3:34 pm

    [...] innovative technologies in enhancing the performance of programmable logic. Based on this need, NEC in collaboration with National Institute of Materials Science has made an announcement on [...]

  2. Development of a Breakthrough Technology for Achieving Low Voltage Operation in System LSI by TOSHIBA | Japan Technology Information on February 8th, 2010 2:34 pm

    [...] on an overall power consumption of a product. However, up to now, voltage scaling of cutting edge system LSI has presented a big technological challenge due to loss of stability in memory function of its [...]

  3. Development of world's First high Reliability Read Method for use in Spin-Torque-Transfer (STT) MRAM | Japan Technology Information on February 11th, 2010 7:28 am

    [...] (STT) MRAM is considered as a potential future form of non-volatile memory which can be used as an alternative [...]

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