Development of a Breakthrough Technology for Achieving Low Voltage Operation in System LSI by TOSHIBA
System LSI constitute the core components of digital products, where their operation voltage has a major impact on an overall power consumption of a product. However, up to now, voltage scaling of cutting edge system LSI has presented a big technological challenge due to loss of stability in memory function of its embedded SRAM which occurs at low voltage. The smaller size of the memory cell transistor of SRAM makes SRAM susceptible to transistor variability at low voltage in comparison to other logic circuits. In order to overcome this issue, Toshiba has developed a SRAM circuit technique which results in a low voltage operation in system LSI, paving the way in reduced power consumption in digital products.
The new technology results in successful operation of static random access memories (SRAM) at low voltage with an improved circuit design capable of optimizing voltage control of the bit line and word line. Furthermore, the new technology overcomes the high failure rate in achieving practical. low voltage SRAM, while reducing memory cell failure rate by four times at 0.7V. Additionally, the circuit design can be applied to the memory compiler, a software responsible for automatically configuring SRAM, resulting in a shorter design lead times and bringing an effective solution to the LSI development precess. there have been other approaches for securing SRAM stability such as employing a memory cell which increases the transistor count from the usual number of six. However Toshiba’s approach provide a more efficient way as it requires no increase in transistor resulting in a much smaller SRAM cell area.
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