Introduction of Next Generation 24nm NAND with Integrated Error Management
Toshiba made an announcement on release of next generation 24nm NAND featuring with an integrated error management. The newly developed “SmartNAND™” support simplified host-side design as well as application of advanced NAND process generation in consumer applications such as digital audio players, tablet PCs, information equipment, digital TVs as well as set-top boxes and other applications requiring high-density, non-volatile memory.
The new chips are designed to eliminate the burden of ECC from the host processor while at the same time minimize the protocol changes. The 5 chips in this lineup come with 4 to 64 gigabyte (GB) capacity. Samples of the SmartNAND will be available from middle of April with mass production to follow in the second quarter of 2011.