Development of Low Power, Low Noise All-Digital Phase Lock Loop LSI by NEC
As demand for short distance radio communication for such systems as remote controllers, alarm systems and automatic meter reading is on the rise, one major concern that has preoccupied manufacturers of these systems is their power consumption, requiring these systems to have a longer battery life. At the same time, small and lightweight criteria for wireless devices imposed by the market demand forcing manufacturer to further reduce the battery, however, reduced battery size will translate to reduced total available energy. For such battery driven devices one way to extend the battery life is through intermittent operation through use of all digital PLL (Phase Lock Loop) offering a quick operations as well as their advantage in eliminating large on-chip passive filters. In comparison analog-based PLL does not constitute a good solution due to their long start-up time. Based on this requirement, NEC and NED Electronics developed a low-power low-noise all-digital phase lock loop (ADPLL) LSI targeted to be employed in midget wireless equipment yielding a long operation lifetime for small sized batteries. Read more
